The Lockheed-Martin F-35 Lightning II is the US military’s current top-of-the-line fighter aircraft, but its history of cost overruns and technical issues has made it a poster child for government waste. And that may be nothing compared to the next generation of air combat technology. At a recent House Armed Services Committee hearing, Air Force Secretary Frank Kendall claims the so-called Next-Generation Air Dominance (NGAD) aircraft could cost hundreds of millionseach, reports DefenseNews.
Military hardware is always vastly more expensive than you’d think. Long-time government contractors like Lockheed-Martin and Northrop Grumman have become adept at winning low-bid contracts that entitle them to bill the government for cost overruns. Northrop’s B-2 Spirit stealth bomber was pitched at a cost of about $500 million each, but the final price tag as of the late 90s was closer to $2 billion. The F-22, which will be replaced by the NGAD, was initially supposed to cost about $80 million, but the fly-away cost eventually soared to more than $130 million, and it’s around $600 million when parts and support are included. The F-35 can run upward of $130 million, depending on the service branch variant.
That puts the statement by Secretary Kendall in a different context. The NGAD program will eventually lead to the production of a sixth-generation fighter, but we’re easily a decade away from seeing a finished model take to the skies (military commanders claim a prototype has already flown). That leaves a lot of time for design changes and engineering challenges to inflate the cost. We may even be looking at total costs in the same range as the Spirit bomber, of which the US only bought 21. The demand for an air superiority fighter is necessarily much greater — the military purchased almost 200 F-22s.
The US has just under 200 F-22 fighters, which will have to last until the NGAD replaces it in the 2030s.
There’s no doubt the NGAD will be a fabulously expensive airplane, but there’s still some hope the total cost of the program won’t be as obscene as many fear. Allegedly, the program is designed to hold down costs more than past contracts, stressing the use of modular components and additional funding controls to keep maintenance and repair costs lower.
Kendall also noted the NGAD will be accompanied by smaller, less expensive combat aircraft. He envisions a small wing of remotely piloted drones flying along with each NGAD. But if the crewed jet is going to cost hundreds of millions (at least) each of its drone wingmen could end up costing as much as the early F-22 airframes.
Until the NGAD arrives, the US will continue flying the F-22. Hopefully its supply holds out — Lockheed-Martin recently told the government that restarting the F-22 production line would boost the price to $206–$216 million per aircraft. That’s NGAD money!
Recently we’ve reported on the high-stakes bidding war unfolding behind the scenes over TSMC’s upcoming 3nm node. Its 5nm process is/was an unquestioned success and its 3nm process node is expected to lead the industry as well. The only question is which companies would have deep enough pockets to secure it. We’ve speculated previously that it would be Intel and Apple. Now a report from Digitimes confirms this is indeed happening. That by itself is just confirmation of earlier reports, but the new twist is that it might leave AMD out in the cold.
The new reporting is from Digitimes via Wccftech, and it states that AMD is planning on using TSMC 3nm for its Zen 5 CPUs. As a refresher, the company is using TSMC’s 5nm node currently on its Zen 4 architecture, which should debut later this year. After that it was apparently hoping to jump to the newer node, but apparently Apple and Intel have already secured the entirety of TSMC’s wafer capacity. Apple is reportedly using it for its M2 silicon, and Intel needs it for its Meteor Lake GPU tiles. TSMC is expected to begin production at 3nm later this year, with mass production starting in 2023. However, if TSMC is only capable of filling orders for Intel and Apple through next year, that’ll push AMD to the back of the line. This could force the company to have to wait until 2024, or even 2025, to get access to its most advanced node. Digitimes notes that Nvidia and Mediatek might also be affected by TSMC’s prioritization of Apple and Intel. As we wrote previously, everybody wants a piece of that 3nm node.
One point to note, however: A fast shift to 3nm would be unusual for AMD. It’s been years since GPUs or CPUs led node launches; mobile chips are always the first to debut. A fast shift from 5nm to 3nm would have been unusual. Several generations of 5nm product would be normal based on Ryzen’s development timeline.
At first blush, this seems like a big problem for AMD. However, assuming Zen 4 launches in late 2022, that would mean Zen 5 could appear roughly two years later. This is a similar cadence the company has followed from Zen 2 to Zen 3, so it might not be that large of a disruption after all. Also AMD doesn’t have to worry about Intel getting 3nm CPUs from TSMC, as Intel will be making the majority of its own CPUs in its own fabs. Intel has also argued that node superiority will soon be a vestige of the past as packaging technology takes a more prominent role in an architecture’s performance profile.
Roadmaps like AMD’s were drawn up years in advance.
It’s also quite possible that AMD could stick with 5nm for Zen 5 too. After all, it used TSMC’s 7nm node for both Zen 2 and 3. However, it wasn’t facing down a revitalized Intel in those days. By 2025 Intel has announced it will have already moved beyond FinFET to its next generation technology. This includes a new RibbonFET gate-all-around transistor and PowerVIA interconnect technology. These are expected to appear on its tile-based Arrow Lake architecture. Intel isn’t blowing smoke this time either, as it’s already announced it’s ahead of schedule with its advanced node development. This could put AMD in a tight spot come 2025.
As for why TSMC might be prioritizing Intel and Apple, let’s look at the number the companies recently posted. Apple announced its first quarter revenue for 2022 was a staggering $97.3 billion, and $25 billion of that was profit. Intel posted $18.4 billion in revenue for the first quarter (a seven percent year-over-year decline). AMD will post its Q1 earnings on May 3rd, but they’re expected to be approximately $5 billion. Clearly Intel and Apple have bigger bank accounts. Also, both companies seem willing to open their check books, no matter what the cost. One final interesting note is we previously reported Intel wanted to get its hands on TSMC’s 3nm capacity without upsetting Apple. Intel even sent its reps to Taiwan to handle the deal directly. Apparently, the company has succeeded, though we’d still treat all this as speculation until we hear it directly from TSMC.
An enterprising group of engineers from Carnegie Mellon has released the results of a unique experiment. The team has been working on improving Virtual Reality (VR) by adding more sensations for the user to feel. Unlike existing kits which produce vibrations with handheld controllers, this team added puffs of air aimed directly at the mouth. The logic behind the decision is sound: the mouth has the second-highest number of mechanoreceptors in the entire body. The only area of the body that’s more sensitive is a person’s fingertips.
The group is part of the university’s Future Interfaces Group, and its goal was to deliver “rich, tactile sensations” in VR. The team noted that current solutions only deliver feedback in a player’s hands, but more was needed. Currently, alternative solutions do exist like haptic vests and exoskeletons, but those haven’t achieved widespread adoption. An additional challenge is people don’t want to be tethered, encumbered, or have their entire face covered. This lead to the idea for a compact, beamforming array of ultrasonic transducers. They are mounted on the bottom of the headset, and aimed directly at the operator’s mouth.
The result is a fairly inconspicuous array of transducers that “focus air-borne acoustic energy onto the lips and into the mouth.” Yes, they designed it to produce sensations “into the mouth.” This allows you to feel pulses on your teeth and tongue in addition to the outside of your lips. The effects you can feel range from subtle taps to continuous vibrations. The team notes they can animate these effects along arbitrary 3D paths, creating effects that feel realistic.
So, what kind of effects are we talking about here? If you’re the squeamish type, stop reading now. In the video above it shows the player walking through cobwebs that get stuck to her face. A “wipe” animation is activated to simulate the spiderweb sliding off her face. That’s not too bad, but it gets even ickier. In the next example, a spider jumps onto her mouth, and proceeds to “scurry” all over her face. If you haven’t ripped the headset off by now, you’re a brave gamer. Moving on, next she has to shoot a spider with a flare gun. This causes the spider’s guts to splatter across her mouth, which is painful just to type. Finally, she has to walk under a shower of venom dripping down from a spider, which she can feel wash across her face. Gee, where can we sign up for this?!
Sure, it’s a tad bulky, but it’s a prototype. (Photo: Future Interfaces Group/Carnegie Mellon)
As far as real world simulations that don’t involve spiders go, the team also created a school simulation, including taking a drink at a water fountain, where the user feels water splashing on their lips. Next, they take a swig of coffee that produces “z swipes” to simulate liquid entering their mouth. Finally, they can take a drag on a cigarette, and even brush their teeth. The latter producing pulses of sound on their teeth to enhance the experience. The team also made a motorcycle simulation where the rider can feel the wind on their face. They can also feel puddles splashing them, and similar sensations related to forward movement. We’d definitely like to try the motorcycle experience, as that sounds like a very immersive use for this technology. (Perhaps it could include the sensation of occasionally eating a bug? – Ed)
You too can experience the thrill of drinking coffee, virtually! (Photo: Future Interfaces Group/Carnegie Mellon)
Whether this will ever make it out of the lab and into a consumer headset remains to be seen. However, Meta, Apple, and Sony might take a close look at it. Sony has already announced its upcoming PSVR2 headset will include haptic feedback in the headset, which is a first. Clearly companies are examining ways to provide additional levels of immersive feedback. Meta is also hard at work on a haptic glove, as we reported previously. Gizmodo snarkily concluded the real goal of this project was to simulate the feel of kissing someone. Which just raises an even more unsettling question; will there be a Tinder in the metaverse?
When it was on the ground, the James Webb Space Telescope was the cause of much hand-wringing and debate at NASA. The project encountered numerous setbacks and cost overruns, but it has all paid off in space. After its launch in late 2021, everything has been coming up roses for Webb. Keeping with the trend, NASA now says the telescope is fully aligned, and its vision is perfect, bringing us one step closer to full operational status.
The James Webb Space Telescope (JWST) is the culmination of decades of work at NASA to design a successor for the aging Hubble Space Telescope. That observatory has suffered a series of hardware failures in recent years, and it’s running out of redundant systems with no plans for another servicing mission. Luckily, Webb is proving to be the next-generation window to the universe we hoped it would be. Every phase of the mission, starting with the launch that extended the spacecraft’s life by years, has gone perfectly, and that applies to the now-completed alignment phase.
Unlike Hubble, the JWST uses a multi-faceted Korsch-style mirror. The total surface area is 6.5 meters across all 18 hexagonal segments, which is much larger than Hubble’s single 2.4-meter parabolic mirror. The drawback, however, is that Webb had to fold its mirror up to fit inside the Ariane 5 rocket that blasted it to space. It’s been a painstaking process to align all those segments, ensuring they produce a single image instead of 18 different points of light. This involves making nanometer-scale changes to the angle of each mirror segment. Even a small mistake could cause images to come back blurred.
NASA has been inching toward full alignment for months, starting in March when it announced the primary NIRCAM instrument was perfectly configured. That wasn’t the end of calibration, though. Webb has three other instruments that needed alignment work, plus a “fine guidance sensor” that uses the primary mirror to stabilize images. Now, NASA says all those components are aligned and ready for action. It has provided an amazing mosaic of images from each sensor as proof (above), marking the first time Webb has beamed back proper images from all of its science instruments. NASA says image quality on all the instruments is “diffraction-limited,” which means it’s as good as it can possibly be given the size of the telescope.
Stop me if you’ve heard this one before, but Webbstillisn’t quite ready to begin science operations. Up next is a nebulous process known as commissioning. In this phase, NASA will conduct experiments on each detector to ensure they are operating as designed. That way, we know the data they send back is an accurate representation of the universe. The observatory will also be rotated to vary the amount of solar radiation hitting the sunshield. We’re still on track to have Webb fully operational and doing science this summer.
Microsoft is planning to enhance its Edge browser by adding built-in support for a VPN (Virtual Private Network). The official Microsoft support page for the service says it’s called the Microsoft Edge Secure Network.VPNs are typically used to create private connections over a public or semi-public network.
VPNs route your traffic through a server before sending you off to your destination. Traffic from the VPN server is encrypted, which hides your IP address from the sites you visit. This allows you to keep your browsing habits private, at least as far as your ISP is concerned. They’ve become a lot more prominent in the past few years as identity theft and online malfeasance has increased. Microsoft’s version will be run by Cloudflare according to the support page. It’s built directly into the Edge browser, with a few caveats.
The most unsurprising is Microsoft looks to be adding it as a free service, but with a data cap. Users will be able to send 1GB of data through the VPN per month, and that’s it. It’s unclear if it’ll offer a paid version with a higher data cap. It’s very possible it’ll offer more data for people who purchase Microsoft services like OneDrive. You also have to be signed in to your Microsoft account to use it; also not a surprise. A sign-in is necessary for Microsoft to track how much data you’ve sent through the VPN. You’ll be able to click a small badge icon to see how much data you’ve used.
Microsoft says its VPN service will hide your IP and browsing habits from your ISP. It’ll also mask your specific location so advertisers can’t target you. As far as Cloudflare goes, the company says it “collects a limited amount of diagnostic and support data,” but that it deletes this data every 25 hours. How long a VPN keeps logs of users’ activity is important, and a 25-hour deletion policy is actually quite good. Some VPNs says they keep no logs, but most do, and the length of time they hold onto them before deleting them varies. Microsoft says Cloudflare has agreed to not sell any user data to a third party. It also won’t use anything it collects to create a profile of a user.
The one issue that’s unclear about Microsoft’s implementation is how it will affect performance. When you connect to a distant server before connecting to a site, it always adds latency. The big VPN providers mitigate this issue but hosting servers in as many locations around the globe as possible. This allows almost any user to be able to connect to a server that’s close to them. Though Microsoft has considerable pre-installed infrastructure, PCMag hypothesizes it’s not a true VPN. Instead it just hides your DNS lookups and gives you a virtual IP address. This could achieve the same privacy benefits without impacting performance.
Like all “preview” features, Microsoft is just testing this feature now so it can get feedback. However, apparently not even Insiders have access to this feature yet according to the XDA Developers site. That could mean the support page shouldn’t have been made public. Or it just went live too soon and the VPN feature will show up shortly in a preview build of Edge. If it adds VPN support it will join Opera and Firefox, which offer a free and paid VPN add-on, respectively.
Over the past few months Microsoft has been toying with several add-ons for its Edge browser. It’s dabbled with adding games, a way to take out short-term loans, and it added anti-Chrome pop-ups. At least this time, the company built something browser users might actually benefit from using.
It’s surprisingly hard to pin down exactly how Apple’s M1 compares to Intel’s x86 processors. While the chip family has been widely reviewed in a number of common consumer applications, inevitable differences between macOS and Windows, the impact of emulation, and varying degrees of optimization between x86 and M1 all make precise measurement more difficult.
An interesting new benchmark result and accompanying review from app developer and engineer Craig Hunter shows the M1 Ultra absolutely destroying every Intel x86 CPU on the field. It’s not even a fair fight. According to Hunter’s results, an M1 Ultra running six threads matches the performance of a 28-core Xeon workstation from 2019.
That’s… impressive.
Any lingering hopes that the M1 Ultra suffers a sudden and unexplained scaling calamity above six cores are dashed once we extend the graph’s y-axis high enough to accommodate the data.
And it doesn’t really get better for x86. At least the M1’s scaling is bending at this point.
This is an enormous win for the M1. Apple’s new CPU is more than 2x faster than the 28-core Mac Pro’s highest result. But what do we know about the test itself?
Hunter benchmarks USM3D, is described by NASA as “a tetrahedral unstructured flow solver that has become widely used in industry, government, and academia for solving aerodynamic problems. Since its first introduction in 1989, USM3D has steadily evolved from an inviscid Euler solver into a full viscous Navier-Stokes code.”
As previously noted, this is a computational fluid dynamics test, and CFD tests are notoriously memory bandwidth sensitive. We’ve never tested USM3D at ExtremeTech and it isn’t an application that I’m familiar with, so we reached out to Hunter for some additional clarification on the test itself and how he compiled it for each platform. There has been some speculation online that the M1 Ultra hit these performance levels thanks to advanced matrix extensions or another, unspecified optimization that was not in play for the Intel platform.
According to Hunter, that’s not true.
“I didn’t link to any Apple frameworks when compiling USM3D on M1, or attempt to tune or optimize code for Accelerate or AMX,” the engineer and app developer said. “I used the stock USM3D source with gfortran and did a fairly standard compile with -O3 optimization.”
“To be honest, I think this puts the M1 USM3D executable at a slight disadvantage to the Intel USM3D executable,” he continued. “I’ve used the Intel Fortran compiler for over 30 years (it was DEC Fortran then Compaq Fortran before becoming Intel Fortran) and I know how to get the most out of it. The Intel compiler does some aggressive vectorization and optimization when compiling USM3D, and historically it has given better performance on x86-64 than gfortran. So I expect I left some performance on the table by using gfortran for M1.”
We asked Hunter what he felt explained the M1 Ultra’s performance relative to the various Intel systems. The engineer has decades of experience evaluating CFD performance on various platforms, ranging from desktop systems like the Mac Pro and Mac Studio to actual supercomputers.
“Based on all the testing past and present, I feel like it’s the SoC architecture that is making the biggest difference here with the Apple Silicon machines, and as we invoke more cores into the computation, system bandwidth is going to be the main driver for performance scaling. The M1 Ultra in the Studio has an insane amount of system bandwidth.”
The benchmark is based on the NASA USM3D CFD code, which is available to US Citizens by request at software.nasa.gov. It comes as source code and will need to be compiled with a Fortran compiler (you also will need to build OpenMPI with matching compiler support). The makefiles are setup for macOS or Linux using the Intel Fortran compiler, which creates a highly optimized executable for x86-64. You could also use gfortran (what I used for the arm-64 Apple M1 systems) but I’d expect the performance to be lower than what ifort can enable on x86-64.”
What These Results Say About the x86 / M1 Matchup
It’s not exactly surprising that an SoC with more memory bandwidth than any previous CPU would perform well in a bandwidth-constrained environment. What’s interesting about these results is that they don’t necessarily depend on any particular facet of ARM versus x86. Give an AMD or Intel CPU as much memory bandwidth as Apple is fielding here, and performance might improve similarly.
In my article RISC vs. CISC Is the Wrong Lens for Comparing Modern x86, ARM CPUs, I spent some time discussing how Intel won the ISA wars decades ago not because x86 was intrinsically the best instruction set architecture, but because it could leverage an array of continuous manufacturing improvements while iteratively improving x86 from generation to generation. Here, we see Apple arguably doing something similar. The M1 Ultra isn’t trashing every Intel x86 CPU because it’s magic, but because integrating DRAM on-package in the way Apple did unlocked tremendous performance improvements. There is no reason x86 CPUs can’t take advantage of these gains as well. The fact that this benchmark is so memory bandwidth limited does suggest that top-end Alder Lake systems might match or exceed older Xeons like the 28-core Mac Pro, but it still wouldn’t match the M1 Ultra for sheer bandwidth between the SoC and main memory.
In fact, we do see x86 CPUs taking baby steps towards integrating more high-speed memory directly on package, but Intel is keeping this technology focused in servers for now, with Sapphire Rapids and its on-package HBM2 memory (available on some future SKUs). Neither Intel nor AMD have built anything like the M1 Ultra, however, at least not yet. Thus far, AMD has focused on integrating larger L3 caches rather than moving towards on-package DRAM. Any such move would require buy-in from OEMs and multiple other players in the PC manufacturing space.
I don’t expect either x86 manufacturer to rush to adopt technology just because Apple is using it, but the M1 puts up some extraordinary performance in certain tests, at excellent performance per watt. You can bet every aspect of the Cupertino company’s approach to manufacturing and design has been put under a (likely literal) microscope at AMD and Intel. That especially applies to gains that aren’t tied to any particular ISA or manufacturing technology.
For decades, bent pins have been one of the realities of buying, installing, and swapping CPUs, especially if you’ve stuck with AMD chips after Intel moved to LGA processors back in 2004. While there are undoubtedly a few lucky individuals blessed with steady hands, fast reflexes, and a merciful lack of pets known to walk across a table with less than perfect regard for its contents, the majority of longtime AMD enthusiasts have dealt with bent pins at one point or another.
“Hurrah! I love doing this,” said no one, ever.
One of the most common ways to fix bent pins is to use a narrow straight-edge like a credit card or a needle to manipulate the pins back into alignment. A loop of thread or dental floss can also sometimes be wrapped around a smashed-flat pin and used to lift it back off the package. But there’s another method for fixing AMD CPU pins. It’s a little less common than the two methods above, but it beats them both hands-down for speed and efficacy, especially if you have a large number of pins to fix. The only tool you’ll need is a mechanical pencil — albeit one with a particular kind of tip, detailed below:
Perturbed Pins
Editor’s Note: The method described here is not brand-new, and we aren’t claiming to have invented it, but it was new to me when Jess suggested it earlier this year. I then ran this idea past some enthusiast friends and fellow reviewers, and while a few people knew about this method of repairing AMD CPU pins, most did not. Out of all the methods I’ve used to fix bent pins over the past 20 years, this is one of my favorites. — Joel
Recently, we brought two AMD CPUs back from the dead using the method we’ll describe below. No pins were broken off, but the chips had a couple different kinds of “injuries.” A swathe of pins had been flattened in various directions, and some pins had their heads bent together. While a fine embroidery needle can lift pins up again, it just wasn’t enough control to straighten them out. Ideally, if we could get the pins straightened out enough, the socket would allow them to insert properly, with the last helpful micro-adjustments provided by the AM4 socket itself. Without intervention, these chips were dead Jim, dead, and we had nothing to lose.
While a needle also proved helpful, the instrument we used for these repairs was a 0.5mm Pentel GraphGear 1000. The outer diameter of its metal nib fits between adjacent CPU pins without pushing on them, while the inner diameter fits just about perfectly around an individual pin. This close fit lets you adjust the angle of the pins relative to the chip, without having to depend on having perfectly steady hands so that you don’t crimp the pin halfway along its length.
To attempt this repair, you will want a workspace that is flat, solid and stable. You’re also going to need lots of light, and a magnifying lens of some kind is also recommended. Be sure there’s no lead in the pencil before you begin. Handle the chip by the edges of its solid base, lay it flat to do the actual repairs, and err on the side of being gentle.
For CPU Pins Bent Flat
Carefully thread the end of the pencil over the bent pin, like an arm through a sleeve, so that the pin slides into the pencil’s empty nib. Gently shift the angle of the whole pencil, and the pin inside will come with it. Slowly, angle the pencil so that the tip rests flat on the pin’s solder joint, and the barrel of the pencil is perpendicular — perfectly upright — against the plane of the green PCB. It shouldn’t take much more force than handling tissue paper.
With the nib firmly against the PCB, rock the eraser end of the pencil a few times in a very small circular “joystick” motion about the perpendicular axis, to equalize bending in any other direction. Although the wire is very fine, the metal pins have a certain resistance to bending, which you should be able to feel through the pencil. Remove the pencil and check results; adjust your angle accordingly.
For pins with their heads bent together
When two pins are bent together, it’s tougher to straighten them out using the pencil trick. So, we prepared them beforehand by separating their heads with a needle; this got the heads far enough apart to straighten both pins using the mechanical pencil.
Lay the needle flat and slide it between the rows of pins, like so, where the “o” is the point of the needle viewed end-on, and the lines are the upward-facing pins: | | | | /o\ | | | | (If the needle doesn’t fit between the rows of pins, it’s too big, and you’ll need something smaller.)
Our test CPU, partially repaired. You can see there’s still some damage along the right-hand edge of pins.
Find the place where the pins catch the needle. Then, with a gentle upward sweeping motion, use the needle as a lever arm and your fingertip as a fulcrum to mechanically separate the pins whose heads are bent together. The motion may feel like an upward flick at the end, because of the bent pins’ resistance. It’s important to sweep straight upward, because if you angle to the side, you may bend other pins. It may take several repetitions of the same thread-and-lift motion to get the metal to “remember” the bend.
Lifting a pin back towards vertical.
Once the heads of the pins stay separated from one another, you can use the pencil to straighten the pin the rest of the way.
Will This Repair Work For Other CPUs? What Kind of Pencil Do You Need?
A repair like this should work on any AMD CPU that has pins, although with older models, you may need to use a pencil with a larger inner diameter to accommodate the larger pins from previous generations. We haven’t tried it, so we can’t recommend it, but the same mechanical pencil we used for these chips is also available in a standard 0.7mm. (Our first instinct was to use the standard Bic “clicky pencil,” but the outer diameter of its nib is too large.)
The chips we repaired were a Ryzen 9 5900X and an AMD A8-5600. This last CPU stood in as our model for the photos above. After the repairs, they were both confirmed to mount properly and booted and ran without incident. This was obviously more important for the 5900X, but we confirmed the 5600 still worked as well following some enthusiastic pin-bending for photographic purposes.
