Yesterday TSMC held a beam-lifting ceremony for its new 3nm production line in Taiwan. The company’s chairman attended the event and had a lot to say about what the company’s newest process will mean for its bottom line, and for the industry as a whole. TSMC chairman Dr. Mark Liu delivered remarks at the ceremony, stating it sees 3nm as a $1.5 trillion dollar cash cow. In addition, he stated the company has so far had no issues with yields — a significant achievement for a cutting-edge process.
As we’ve covered previously, it’s rare for TSMC to hold a ceremony to promote a new manufacturing process, but it comes at a crucial time for the company. Although it’s not the first manufacturer to reach 3nm high-volume production, as Samsung was first, it’s the most noteworthy. The ceremony was held in Taiwan’s Tainan region, according to Wccftech, where the company has two 12-inch wafer GigaFabs. The company has added a second facility to Fab 18 to bolster its 3nm production line. Dr. Liu said the clean rooms of each facility are 58,000 square meters, which is absolutely massive. That translates into over 600,000 square feet, so these facilities are gigantic.
A TSMC 12-inch wafer facility. (Image: TSMC)
At the ceremony, Dr. Liu said its 3nm process will offer a 60% boost in logic density over its 5nm node. It will also consume 35% less power at the same frequency as 5nm. This is a watershed product line for the company, and it will be around for a very long time. The company has stated it plans to offer four versions of it, which it calls FinFlex. This will give companies like Apple, AMD, and Nvidia a “menu” to choose from when designing 3nm chips. It can choose to focus on higher frequencies, low power consumption, high density, or a mixture according to its needs. Dr. Liu stated TSMC believes it will result in $1.5 trillion in revenue for the company over the next five years.
(Image: TSMC)
Dr. Liu also used the occasion to discuss the company’s upcoming 2nm plans. It previously announced it would be moving away from FinFet for this process, as it adopts nanosheet gate-all-around (GAA) transistors. He stated that TSMC’s plans for this next-generation fabrication process are proceeding well. This update contradicted a report from the same day in the Taiwanese media that one of the plants is already experiencing delays. Regardless, he said TSMC plans to begin building the new factories next year, with the goal of entering production in 2025.
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